Next Gen Chips

Shadow Reaper

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0.2nm transistors on the horizon as well as room temperature superconductors that combined, make the chip burn 1/20 the heat of today; removing cooling components, costs and constraints.

View: https://youtu.be/DXgZ3X8z7eE?si=WGnCBr5I1Xkx_Bds


 

AstroSam

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Thanks a lot for the heads up!

Summary:


1. Moore’s Law & the Real Race

  • Despite repeated “death” claims, Moore’s law is still alive; progress just shifted to new dimensions.
  • The real competition is inside the chip—hence Google, NVIDIA, Apple, etc. design custom silicon.
2. Transistor Evolution: Planar → FinFET → Gate-All-Around (GAA)

  • Planar transistors shrank until leakage/control limits were hit.
  • FinFETs (vertical “fins”) restored gate control and density but are now nearing their limits.
  • Next step: Gate‑All‑Around / nanosheets—fins laid sideways, gate wraps all four sides for even better control.
    • TSMC is set to bring GAA to AMD and Apple chips imminently.
3. Backside Power Delivery (BSPDN)

  • Power and signal wires have long shared the chip’s top layers, causing congestion.
  • New approach: route power from the backside, freeing top metal layers for signals—hard to implement but a major density boost.
  • Intel and TSMC are racing to productize this from next year onward.
4. Beyond GAA: CFET & Vertical Stacking

  • IMEC’s roadmap foresees Complementary FETs (CFET): stacking n/p devices vertically like skyscraper floors.
  • Enables Ångström-scale footprints and rescues SRAM density (which doesn’t scale well with GAA).
5. New Materials: Post‑Silicon Era

  • 2D materials (especially MoS₂ and WS₂) are prime candidates for channels only one atom thick—extreme precision needed, very fragile.
  • Carbon nanotubes (CNTs) promise high speed and ultra‑low voltage, but turning them “off” cleanly (leakage) is unresolved.
  • Likely future: heterogeneous “CMOS 2.0” stacks—different materials/tech per layer/function.
6. Lithography & Metal Pitch Scaling

  • Shrinking interconnects (metal pitch) depends on lithography advances more than logic features.
  • High‑NA EUV (already working at ASML) drives the next pitch reductions; later “Hyper Extreme EUV” extends scaling further.
7. The Memory Wall

  • Compute keeps accelerating via architectures/software; memory (SRAM/DRAM) lags in speed and efficiency.
  • SRAM on‑die eats ever more area; CFET’s vertical stacking helps its density.
  • DRAM moves to 3D stacks, but overall memory remains a power/latency bottleneck—next big frontier to fix.
8. AI Capability vs Hardware Gap

  • AI capability roughly doubles every few months, ~4× per year.
  • Hardware performance grows slower (~2× per year), creating a widening gap that architecture/material advances must address.
9. Economics & Industry Players

  • Wafer costs soar with complexity; per‑transistor cost may stay flat thanks to density, but device/service prices can rise.
  • Healthy competition needed: TSMC, Samsung, Intel all invest heavily.
  • Investor watchlist: TSMC (manufacturing), ASML (EUV tools), Applied Materials/ASM (process equipment). IMEC is a non‑profit R&D powerhouse.
10. What It Means for You

  • AI isn’t (just) a threat; it’s leverage. Those who master AI tools will replace those who don’t.
  • The video plugs a free 2‑day AI training (Outskill) to upskill quickly.
 

Shadow Reaper

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Just as important as the changing morphology is the changing materials. If indeed a room temperature superconductor can be manufactured in, this will drop heat and the need to remove it through the floor. CES is saying using their new material will drop power consumption to 1/7 what it would otherwise be, and smaller transistors burn smaller power too, so the combination of sub-nm transistors with superconductors could yield machines that need no active cooling.
 

Thalstan

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Here is the thing. We didn't need massive heatsinks back in the days of the 286, or even the 486. We certainly didn't need liquid cooling back in the days of the pentium and Core architecture. Even a good chunk of metal would do. EACH of today's designs use smaller transistors and use lower voltages, meaning less power per transistor.

BUT
for every time we make things smaller, cooler, etc, we use that excess capacity to make it more powerful. To shove more processors into a system. Ohh, Look, Hyperthreading, now it' like you have two completely different processors when needed.

Today, we have 8 high performance cores and 16 efficiency cores for our top end machines...in about the same footprint as the old 486, core 2, or 3rd gen I7...plus a (not very good) GPU.

Smaller transistors won't change that. Right now, it's not the transistor size that's the limiting factor, it's the average cooling system available with the amount of thermal cooling it can provide, and the amount of power the computer can draw.

In the US, that's about 750-1,500 Watts. Not many people have dedicated 20A supply runs that can supply 2000 Watts all day long, so they are not going to build home computers for that. What they will build are systems that can work within the constraint of the 110 V 15A circuit and can make the most use of the available power.
 
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BUTUZ

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Funnny the system i built now with the minisforum motherboard and 32 cores uses the least power of any system i've built in the last 10 years hehe.

AMD has made progress in gentle power sipping even if intel has not.
 
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Shadow Reaper

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. . .Right now, it's not the transistor size that's the limiting factor, it's the average cooling system available with the amount of thermal cooling it can provide, and the amount of power the computer can draw.
Yes. This is one of the reasons a room temperature superconductor is a holy grail type technology. There are three major applications of note.

First is power transmission lines. We lose an absurd amount of power in copper transmission lines. If this material can be mass produced as wire (which is what they’re working on), this would put an end to power loss in those lines and an enormous amount of power would then be available for new uses.

Second is computers, a 1kw rig generally dissipates all that power as heat somewhere in the system. Yeah, there’s some work that gets done but computers dissipate electric power with heat as their end product. Superconductors in the wires, in the transformers and in the transistors would eliminate so much of the dissipation that a rig that is now about 1kw would be about 150w. That’s the claim of the company working on this so don’t hold your breath but superconductors do not dissipate electricity into heat at all. So eventually these numbers will fall and fall until active cooling is not necessary at all. No fans, etc.

Third big application is electric cars. Right now, we still put the motors in the chassis, but the wheels are wasted space and that’s really where you want a motor if it can be light enough, and you can cool it properly. I think it is Mercedes-Benz who recently released a 750HP motor that weights just 38 lbs. The thing stopping such motors from easy application is they need to be cooled, so each wheel/motor needs its own cooling system complete with radiator, and that can’t be in the wheel. This requires fluids pumped to the rotor (which is stationary apart from steering) and the rotor needs to conduct heat away from the stator. This creates a very hot joint that becomes troublesome. However, if the stator is all permanent magnets and the rotor is all superconductors, there’s no heat to manage apart from secondary friction breaks like what we use now, and they will generate far less heat because the overwhelming majority of the heat generated when breaking is instead turned back into electricity and shipped to the battery.

So let’s hope this Room Temperature Superconductor really is what Cutting Edge Suoerconductors says it is.

It’s not just cars that would be impacted. They’re just the first use case. Literally ALL forms of transportation would eventually go electric if indeed a RTS can be had. Hence, “Holy Grail”.

And of special note, high temperature superconductors that need a jacket type cable carrying liquid nitrogen have been around for about 18-19 years. They’ve been tried in Uber-magnets and transmission lines. One of their interesting features is that even with the jacket, they carry far more current than the same size copper cable. So we have excellent reasons to hope this new material will likewise carry more current in a smaller package. If this is so, high current applications like all transport solutions will shrink remarkably, become more power dense, and in some instances seem to vanish in weight and size. Seriously, this is Houdini stuff to look forward to.
 
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